The use of various electronic devices has become nearly ubiquitous in modern society. For example, desk top and portable electronic devices are typically used daily by office workers and professionals in performing their work. It is not uncommon for such persons to regularly use electronic devices such as personal computer systems, personal digital assistants (PDAs), cellular telephones, pagers, digital sound and/or image recorders, etc. It is not uncommon for such electronic devices to be used in combination with one or more peripherals, such as an external display device, a memory device, a printer, a docking station, a network interface, etc. However, in order to properly interface with a peripheral, not only should the electronic device provide the appropriate physical connection and underlying interfacing protocols, but the electronic device typically must accommodate the signal levels (e.g., voltage levels) native to the peripheral interface.
It is not uncommon for different peripherals to utilize different signal levels at their associated peripheral interface. For example, a memory device provided by a particular manufacturer and/or operating in accordance with a particular standard may utilize peripheral interface signal levels on the order of 1.8V, whereas a similar memory device provided by a different manufacturer and/or operating in accordance with a different standard may utilize peripheral interface signal levels on the order of 2.6V or 3.0V. Although the foregoing example may not initially appear to be a large difference in signal level, electronic components may experience reliability (the capability of the component to operate without degraded performance over a long period of time) issues if designed for a lower signal level, such as 1.8V, and operated with a higher signal level, such as 2.6V or 3.0V.
The reliability of individual electronic components, such as transistors, can be compromised in many ways, such as electrical stress caused by prolonged application of electric fields across the terminals of the transistor. As these electric fields become higher, the lifetime of the electronic component is reduced. By way of example, the reliability limits for metal oxide on silicon (MOS) transistors depend on different breakdown phenomena including time dependent dielectric breakdown (TDDB), hot carrier injection (HCI), and negative bias temperature instability (NBTI). The reliability limits associated with each of the foregoing phenomenon for 45 nm MOS (1.8V) electronic components are provided in the table below. From this table, it can readily be appreciated that operation of such electronic components using signal levels of 2.6V or 3.0V are likely to present reliability issues.
Phenomenon45 nm (1.8 V thick oxide device)Maximum Voltage (V)TDDBNMOS2.7PMOS2.7HCINMOS2.0PMOS2.2NBTIPMOS2.0
Various techniques have been employed in attempting to accommodate peripherals having different signal levels associated therewith. FIG. 1 shows exemplary prior art electronic device 100 having a plurality of input/output circuits, each configured to accommodate a particular signal level. Input/output circuit 120, for example, may comprise electronic components designed to accommodate a first signal level (e.g., 1.8V), whereas input/output circuit 130 may comprise electronic components designed to accommodate a second signal level (e.g., 2.6V). That is, circuitry of output path 121 and circuitry of input path 122 may be adapted to reliably operate with peripherals interfacing using 1.8V signals. Circuitry of output path 131 and circuitry of input path 132 may thus be adapted to reliably operate with peripherals interfacing using 2.6V signals. Host circuitry 101, such as may provide core operating functions of device 100, may be adapted to interface with input/output circuits 120 and 130 using respective signal levels.
The technique for accommodating peripherals having different signal levels shown in FIG. 1 presents issues with respect to size and cost. Specifically, the illustrated embodiment provides for two separate input/output circuits, thus requiring additional physical area to house the circuitry. Moreover, costs associated with added components are incurred in the illustrated technique.
Another technique for accommodating peripherals having different signal levels is to utilize input/output circuitry, such as input/output circuitry 130 of FIG. 1, designed to accommodate a higher signal level (e.g., 2.6V) both with peripherals interfaced using the higher signal level and peripherals interfaced using a lower signal level (e.g., 1.8V). Operating electronic devices with an electronic field lower than that the device is designed for will typically not result in the foregoing reliability issues. However, the use of circuitry designed for higher signal levels is generally not energy efficient and also degrades performance. Specifically, utilizing electronic components which are designed to accommodate higher signal levels in processing lower signal levels generally consumes more energy than utilizing appropriately designed electronic components.
Electronic devices today are becoming smaller and power management is becoming vital. For example, in order to maximize battery life in a portable device, even relatively small savings in power consumption can be important. Thus, utilizing input/output circuitry designed to accommodate higher signal levels when processing lower signal levels, although typically not providing reliability issues, results in undesired power consumption.